- 초가속수명시험(HALT) 및 고장분석을 이용한 실장기판의 신뢰성 향상방안
- ㆍ 저자명
- 송병석,조재립,Song. Byeong-Suk,Cho. Jai-Rip
- ㆍ 간행물명
- 신뢰성응용연구
- ㆍ 권/호정보
- 2004년|4권 2호|pp.121-131 (11 pages)
- ㆍ 발행정보
- 한국신뢰성학회
- ㆍ 파일정보
- 정기간행물| PDF텍스트
- ㆍ 주제분야
- 기타
HALT (Highly Accelerated Life Test) was performed to improve the reliability by removing the potential failure for newly developing PCB used for the vibration condition from 2OHz to 2OOHz. During HALT, it is found that the lead of Al electrolytic capacitor of SMD type is detached from PCB. As the result for the failure analysis and FEM (Finite Element Method), it is clarified that the root cause for this failure is the improper attachment of an Al electrolytic capacitor on PCB by the mistake of a PCB design. HALT was performed in previous condition to verify the failure analysis after molding an epoxy resin to overcome the PCB design mistake and it is not observed the same failure. Therefore, it is assumed that the same failure in field will be not occurred by the proper implementation.