A method on the hardware implementation of the Multi-channel FIR digital filter using Digital Quarter Square Multiplication(DQSM) algorithm is proposed. This paper describes that ROM requirement can be reduced by using the double precision algorithm and the absolute value circuit, and also execution speed can be improved by reducing logic level steps of absolute value circuit. The frequency response of the four channel FIR digital filter implemented by the above method is quite agreeable with the frequency response simulated by Remez excahange algorithm.