- 증착시 도핑된 비정질 Si 게이트를 갖는 MOS 캐패시터와 트랜지스터의 전기적 특성
- ㆍ 저자명
- 이상돈,이현창,김재성,김봉렬
- ㆍ 간행물명
- 電子工學會論文誌. Jounnal of the Korea institute of telematics and electronics. A. A
- ㆍ 권/호정보
- 1994년|6호|pp.107-116 (10 pages)
- ㆍ 발행정보
- 대한전자공학회
- ㆍ 파일정보
- 정기간행물| PDF텍스트
- ㆍ 주제분야
- 기타
In this paper, The electrical properties of MOS capacitors and transistoras with gate of in-situ doped amorphous Si and poly Si doped by POCI$_3$. Under constant current F-N stress, MOS capacitors with in-situ doped amorphous Si gate have shown the best resistance to degradation in reliabilty properties such as increase of leakage current, shift of gate voltage (V$_{g}$). shift of flat band voltage (V$_{fb}$) and charge to breakdown(Q$_{bd}$). Also, MOSFETs with in-situ doped amorphous Si gate have shown to have less degradation in transistor properties such as threshold voltage, transconductance and drain current. These improvements observed in MOS devices with in-situ doped amorphous Si gate is attributed to less local thinning spots at the gate/SiO$_2$ interface, caused by the large grain size and the smoothness of the surface at the gate/SiO$_2$ interface.