There are many testable design techniques, among which Scan path and BIST techniques are mainly used. In this paper, the increase of design effectiveness is discussed, when these techniques are applied to the practical implementation of chips. The following techniques are presented : 1) Blocks are commonly used to reduce test time without hardware increase, 2) MUX is used to implement the shortest Scan path, 3) Scan register is used which controls and/or observes several blocks to avoid the increase of hardware.