The 23GHz 1-state LNA was designed by using MPIE numerical analysis and conventional design EEsof softwares. The circuit was designed using conventional tools but analyzed and modified by using numerical MPIE tools. he matching sections was designed with parallel coupled filter-type, which gives impedance matching and DC blocking and has small discontinuities. THe FET chip is directly attached to the graound metal. The designed LNA gives 5.8dB gain and 2.5dB noise figure withoug considering the loss and impedance shift of connectors that degenerate the gain and noise figure considerably. this results gives very promising characteristics for our design process and matching schemes and fabrication technologies.