The optimization problem of BDDs plays an improtant role in the area of logic synthesis and formal verification. Since the variable ordering has great impacts on the size and form of BDD, finding a good variable order is very important problem. In this paper, a new variable ordering scheme called incremental optimization algorithm is presented. The proposed algorithm reduces search space more than a half of that of the conventional sifting algorithm, and computing time has been greatly reduced withoug depreciating the performance. Moreover, the incremental optimization algorithm is very simple than other variable reordering algorithms including the sifting algorithm. The proposed algorithm has been implemented and the efficiency has been show using may benchmark circuits.