Multistage interconnection networks (MINs) have been recognized as an efficient interconnection network for high-performance computer systems and also have been recently identified to be effective for a switching fabric of new communication structures - gigabit ethernet switch, terabit router, and ATM (asynchronous transfer mode). While lots of models analyzing the performance of MINs have been proposed, they are either inaccurate or, even if accurate, very complex for the analysis. In this paper, we propose an extremely simple mode for evaluating the multibuffered MIN with small clock cycles based on the approximation approach. Comprehensive computer simulation shows that the proposed model is very accurate in terms of the throughput and mean delay. Furthermore, it significantly reduces the computing overhead due to its simplicity.