There is an increasing interest in high-speed signal processing in modern telecommunication and SC circuit, HDTV, ISDN. There are many methods of high-speed signal processing. This paper describes a design approach for the realization of high-frequency Op-amp in CMOS technology. A limiting factor in Op-amp based analog integrated circuits is the limited useful frequency range. this thesis will develop a CMOS op-amp architecture with improved gainband width product with this technique an op-amp will achieve up to 170MHz (CL=2pF) unity-gain frequency with a 1.2-micron design rule. This CMOS op-amp is particularly suitable for achieving wide and stable closed-loop band widths, such as required in high-frequency SC filters, high-speed analog circuits.