The SiH$_4$soak step is widely used to prevent the WF$_{6}$ attack to the underlayer metal using the chemical vapor deposition (CVD) method. Reduction or skipping of the SiH$_4$soak process time if lead to optimizing W-plug deposition process on via. The electrical characteristics including via resistance and the structure of W-film are affected by the time of SiH$_4$soak process. The possibility of elimination of SiH$_4$soak process is confirmed In the case of W- film grown on the stable Ti/TiN underlayer.r.