- 열처리 방법에 따른 실리콘 기판쌍의 접합 특성
- ㆍ 저자명
- 민홍석,이상현,송오성,주영창
- ㆍ 간행물명
- 전기전자재료학회논문지
- ㆍ 권/호정보
- 2003년|16권 5호|pp.365-371 (7 pages)
- ㆍ 발행정보
- 한국전기전자재료학회
- ㆍ 파일정보
- 정기간행물| PDF텍스트
- ㆍ 주제분야
- 기타
We prepared silicon on insulator(SOI) wafer pairs of Si/1800${AA}$ -SiO$_2$ ∥ 1800${AA}$ -SiO$_2$/Si using water direct bonding method. Wafer pairs bonded at room-temperature were annealed by a normal furnace system or a fast linear annealing(FLA) equipment, and the micro-structure of bonding interfaces for each annealing method was investigated. Upper wafer of bonded pairs was polished to be 50 $mu extrm{m}$ by chemical mechanical polishing(CMP) process to confirm the real application. Defects and bonding area of bonded water pairs were observed by optical images. Electrical and mechanical properties were characterized by measuring leakage current for sweeping to 120 V, and by observing the change of wafer curvature with annealing process, respectively. FLA process was superior to normal furnace process in aspects of bonding area, I-V property, and stress generation.