- Development of Hardware-in-the-Loop Simulation System for Use in Design and Validation of VDC Logics
- Development of Hardware-in-the-Loop Simulation System for Use in Design and Validation of VDC Logics
- ㆍ 저자명
- Park. Kihong,Heo. Seung-Jin
- ㆍ 간행물명
- International journal of the Korean society of precision engineering
- ㆍ 권/호정보
- 2003년|4권 3호|pp.28-35 (8 pages)
- ㆍ 발행정보
- 한국정밀공학회
- ㆍ 파일정보
- 정기간행물|ENG| PDF텍스트
- ㆍ 주제분야
- 기타
