In this paper the gate overlap length of the LDMOST is optimized for obtaining longer device lifetime. The LDMOSI device with drift region is fabricated using the $0.25;{mu}m$ CMOS Process. The gate overlap lengths on drift region are $0.1;{mu}m,;0.4;{mu}m;0.8;{mu}m;and;1.1;{mu}m$, respectively. The breakdown voltages, on-resistances and hot-carrier degradations of the fabricated LDMOST devices are characterized. The LDMOST device with gate overlap length of $0.4;{mu}m$ showed the longest on-resistance lifetime, 0.02 years and breakdown voltage of 22 V and on-resistance of $23;mOmega{cdot}mm^2$.