In this paper, based on the process analysis of a semiconductor company, a lot order release procedure (input regulation) is developed for a semiconductor company. The major characteristic of the order release procedure in this paper is to consider the workloads of machines which are obtained from a virtual lot flows by the dispatching rule at machines in the shop of the semiconductor company. The objective is to minimize the cycle time and to obtain other good performances. A simulation is performed in order to evaluate the order release procedure in this paper.