- 터널링 메커니즘을 이용한 메모리 소자 연구
- A Study of Memory Device based on Tunneling Mechanism
- ㆍ 저자명
- 이준하,Lee. Jun-Ha
- ㆍ 간행물명
- 반도체및디스플레이장비학회지
- ㆍ 권/호정보
- 2006년|5권 1호|pp.17-20 (4 pages)
- ㆍ 발행정보
- 한국반도체및디스플레이장비학회
- ㆍ 파일정보
- 정기간행물| PDF텍스트
- ㆍ 주제분야
- 기타
This paper presents of a new type of memory cell that could potentially replace both DRAM and flash memory. The proposed device cell operates by sensing the state of about 1,000 electrons trapped between unique insulating barriers in the channel region of the upper transistor. These electrons are controlled by a side gate on the transistor, and their state in turn controls the gate of the larger transistor, providing signal gain within the memory cell. It becomes faster and more reliable memory with lower operation voltage. Moreover, the use of a multiple tunnel junction (MTJ) fur the vertical transistor can significantly improve the data retention and operation speed.