This paper presents a fast switching CMOS frequency synthesizer with a new coarse tuning scheme for PHS applications. The proposed coarse tuning method selects the optimal tuning capacitances of the LC-VCO to optimize the phase noise and the lock-time. The measured lock-time is about $20{mu}s$ and the phase noise is -121dBc/Hz at 600kHz offset. This chip is fabricated with $0.25{mu}m$ CMOS technology, and the die area is $0.7mm{ imes}2.1mm$. The power consumption is 54mW at 2.7V supply voltage.