The objective of this study is to evaluate the characteristics of a newly proposed high-speed drive method for the gray scale display for high-resolution plasma display panels(PDP). In the experiment it was found that the characteristics of gray scale display are not closely affected by a priming period below 50[${mu}s$], the width of the priming period, and that it can be driven stably from the brightest sub-field to the darkest sub-field even though a priming discharge is applied to the 1 TV-field only once. Moreover, from the experimental result, the gray scale pattern of 8-bit and 9 sub-fields was stably displayed in the experimental PDP with scan pulses having the pulse width of 0.7[${mu}s$]. An address voltage margin of about 25[V] and a sustain voltage margin of about 10[V] was obtained.