The a-Si:H TFTs decreasing parasitic capacitance of source-drain is fabricated on glass. The structure of a-Si:H TFTs is inverted staggered. The gate electrode is formed by patterning with length of $8{mu}m{sim}16{mu}m$ and width of $80{sim}200{mu}m$ after depositing with gate electrode (Cr) $1500{AA}$ under coming 7059 glass substrate. We have fabricated a-SiN:H, conductor, etch-stopper and photoresistor on gate electrode in sequence, respectively. The thickness of these, thin films is formed with a-SiN:H ($2000{mu}m$), a-Si:H($2000{mu}m$) and $n^+a-Si:H$ ($500{mu}m$). We have deposited $n^+a-Si:H$, NPR(Negative Photo Resister) layer after forming pattern of Cr gate electrode by etch-stopper pattern. The NPR layer by inverting pattern of upper gate electrode is patterned and the $n^+a-Si:H$ layer is etched by the NPR pattern. The NPR layer is removed. After Cr layer is deposited and patterned, the source-drain electrode is formed. The a-Si:H TFTs decreasing parasitic capacitance of source-drain show drain current of $8{mu}A$ at 20 gate voltages, $I_{on}/I_{off}$ ratio of ${sim}10^8$ and $V_{th}$ of 4 volts.