An RF front-end dual-conversion receiver for $3{sim}5;GHz$ MB-OFDM UWB systems is implemented in $0.18;{mu}m$ CMOS technology. The receiver includes a two-stage UWB LNA, an RF mixer, an IF I/Q mixer, and a frequency synthesizer. The proposed receiver adopts the dual-conversion architecture to mitigate the burden of design of the frequency synthesizer. Accordingly, the proposed frequency synthesizer generates four LO tones from only one VCO. The receiver front-end achieves power gain of 16.3 to 21 dB, NF of 7 to 7.6 dB over $3{sim}5;GHz$, and IIP3 of -21 dBm, while consuming 190 mW from a 1.8 V supply.