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Fault Classification in Phase-Locked Loops Using Back Propagation Neural Networks
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  • Fault Classification in Phase-Locked Loops Using Back Propagation Neural Networks
  • Fault Classification in Phase-Locked Loops Using Back Propagation Neural Networks
저자명
Ramesh. Jayabalan,Vanathi. Ponnusamy Thangapandian,Gunavathi. Kandasamy
간행물명
ETRI journal
권/호정보
2008년|30권 4호|pp.546-554 (9 pages)
발행정보
한국전자통신연구원
파일정보
정기간행물|ENG|
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이 논문은 한국과학기술정보연구원과 논문 연계를 통해 무료로 제공되는 원문입니다.
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기타언어초록

Phase-locked loops (PLLs) are among the most important mixed-signal building blocks of modern communication and control circuits, where they are used for frequency and phase synchronization, modulation, and demodulation as well as frequency synthesis. The growing popularity of PLLs has increased the need to test these devices during prototyping and production. The problem of distinguishing and classifying the responses of analog integrated circuits containing catastrophic faults has aroused recent interest. This is because most analog and mixed signal circuits are tested by their functionality, which is both time consuming and expensive. The problem is made more difficult when parametric variations are taken into account. Hence, statistical methods and techniques can be employed to automate fault classification. As a possible solution, we use the back propagation neural network (BPNN) to classify the faults in the designed charge-pump PLL. In order to classify the faults, the BPNN was trained with various training algorithms and their performance for the test structure was analyzed. The proposed method of fault classification gave fault coverage of 99.58%.