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Level Up/Down Converter with Single Power-Supply Voltage for Multi-VDD Systems
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  • Level Up/Down Converter with Single Power-Supply Voltage for Multi-VDD Systems
  • Level Up/Down Converter with Single Power-Supply Voltage for Multi-VDD Systems
저자명
An. Ji-Yeon,Park. Hyoun-Soo,Kim. Young-Hwan
간행물명
Journal of semiconductor technology and science
권/호정보
2010년|10권 1호|pp.55-60 (6 pages)
발행정보
대한전자공학회
파일정보
정기간행물|ENG|
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이 논문은 한국과학기술정보연구원과 논문 연계를 통해 무료로 제공되는 원문입니다.
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기타언어초록

For battery-powered device applications, which grow rapidly in the electronic market today, low-power becomes one of the most important design issues of CMOS VLSI circuits. A multi-VDD system, which uses more than one power-supply voltage in the same system, is an effective way to reduce the power consumption without degrading operating speed. However, in the multi-VDD system, level converters should be inserted to prevent a large static current flow for the low-to-high conversion. The insertion of the level converters induces the overheads of power consumption, delay, and area. In this paper, we propose a new level converter which can provide the level up/down conversions for the various input and output voltages. Since the proposed level converter uses only one power-supply voltage, it has an advantage of reducing the complexity in physical design. In addition, the proposed level converter provides lower power and higher speed, compared to existing level converters.