In this paper we propose a design method of X band frequency hopping synthesizer in terms of phase noise and settling time with DDS driven PLL architecture, which has the advantages of high frequency resolution, fast settling time and small size. In addition, a noble method is proposed to remove the synthesizer output spurious signals due to superposition effect of DDS. The spurious signal which depend on its normalized frequency of DDS, can be dominant if they occur within the PLL loop bandwidth. We verify that the sources of that spurious signals are quasi-amplitude modulation and superposition effect, and suggest that such signals can be eliminated by intentionally creating frequency errors in the developed synthesizer.