This paper presents a method of designing hybrid analog/asymmetrical square-root (SR) FIR filters. In addition to the conventional frequency domain constraints, the proposed method considers time-domain constraints as well, including the inter-symbol interference (ISI) and the opening of the eye pattern at the receiver output. This paper also reviews a systematic way to find the discrete-time equivalence of analog parts in a band-limited digital communication system. Thus, a phase equalizer can be easily realized to compensate for the nonlinear phase responses of the analog components. With the hybrid analog/SR FIR filter co-design, examples show that using the proposed method can result in a more robust ISI performance in the presence of the receiver clock jitter.