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Sampling Jitter Effect on a Reconfigurable Digital IF Transceiver to WiMAX and HSDPA
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  • Sampling Jitter Effect on a Reconfigurable Digital IF Transceiver to WiMAX and HSDPA
  • Sampling Jitter Effect on a Reconfigurable Digital IF Transceiver to WiMAX and HSDPA
저자명
Yu. Bong-Guk,Lee. Jae-Kwon,Kim. Jin-Up,Lim. Kyu-Tae
간행물명
ETRI journal
권/호정보
2011년|33권 3호|pp.326-334 (9 pages)
발행정보
한국전자통신연구원
파일정보
정기간행물|ENG|
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이 논문은 한국과학기술정보연구원과 논문 연계를 통해 무료로 제공되는 원문입니다.
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기타언어초록

This paper outlines the time jitter effect of a sampling clock on a software-defined radio technology-based digital intermediate frequency (IF) transceiver for a mobile communication base station. The implemented digital IF transceiver is reconfigurable to high-speed data packet access (HSDPA) and three bandwidth profiles: 1.75 MHz, 3.5 MHz, and 7 MHz, each incorporating the IEEE 802.16d worldwide interoperability for microwave access (WiMAX) standard. This paper examines the relationship between the signal-to-noise ratio (SNR) characteristics of a digital IF transceiver with an under-sampling scheme and the sampling jitter effect on a multichannel orthogonal frequency-division multiplexing (OFDM) signal. The simulation and experimental results show that the SNR of the OFDM system with narrower band profiles is more susceptible to sampling clock jitter than systems with relatively wider band profiles. Further, for systems with a comparable bandwidth, HSDPA outperforms WiMAX, for example, a 5 dB error vector magnitude improvement at 15 picoseconds time jitter for a bandwidth of WiMAX 3.5 MHz profile.