Phase-locked loops (PLL) based on the synchronous reference frame (SRF-PLL) have recently become the most widely-used for grid synchronization in three phase grid-connected inverters. However, it is difficult to study their performance since they are nonlinear systems. To estimate the performances of a SRF-PLL, a canonical small-signal linearized model has been developed in this paper. Based on the proposed model, several significant specifications of a SRF-PLL, such as the capture time, capture rang, bandwidth, the product of capture time and bandwidth, and steady-state error have been investigated. Finally, a noise model of a SRF-PLL has been put forward to analyze the noise rejection ability by computing the SNR (signal-to-noise ratio) of a SRF-PLL. Several simulation and experimental results have been provided to verify and validate the obtained conclusions. Although the proposed model and analysis method are based on a SRF-PLL, they are also suitable for analyzing other types of PLLs.