In this paper, a novel low specific on-resistance SOI LDMOS Device with P+P-top layer in the drift region is proposed and investigated using a two dimensional device simulator, MEDICI. The structure is characterized by a heavily-doped $P^+$ region which is connected to the P-top layer in the drift region. The $P^+$ region can modulates the surface electric field profile, increases the drift doping concentration and reduces the sensitivity of the breakdown voltage on the geometry parameters. Compared to the conventional D-RESURF device, a 25.8% decrease in specific on-resistance and a 48.2% increase in figure of merit can be obtained in the novel device. Furthermore, the novel $P^+P$-top device also present cost efficiency due to the fact that the $P^+$ region can be fabricated together with the P-type body contact region without any additional mask.