The ultra shallow junction was formed by 2-step RTP. Phosphorus solid source(P$_{2}O_{5}$) was transfered on wafer surface during RTG(Rapid Thermal Glass Transfer) of which process condition was 80$0^{circ}C$ and 60sec. The process temperature and time of the RTD(Rapid Thermal Diffusion) were 950~105$0^{circ}C$ during 5~15sec respectively sheet resistances were measured as 175~320$Omega$/m and junction depth and dopth and dopant surface concentration were measured as 0.075~0.18$mu$m and 5${ imes}10^{19}cm^{4}$ respectively. Ti-silicide was formed by 2-step RTA after 300$AA$ Titanium was deposited. The 1st RTA (2nd RTA) was carried out at the temperature of $600^{circ}C$(700~80$0^{circ}C$) for 30 seconds (10~60 seconds) under N$_2$ ambient. Sheet resistances after 2nd RTA were measured as 46~63$Omega$/D. Si/Ti component ratio was evaulated as 1.6~1.9 from Auger depth profile. Ti-Silicided n-p junction diode (pattern size : 400$ imes$400$mu$m) was fabricated under the RTD(the process was carried out at the temperature of 100$0^{circ}C$ for 10seconds) and 2nd RTA(theprocess was carried out at the temperature of 750$^{circ}C$ for 60 seconds). Leakage current was measured 1.8${ imes}10^{7}A/mm^{2}$ at 5V reverse voltage. Whent the RTD process condition is at the temperature of 100$0^{circ}C$ for 10seconds and the 2nd RTA process condition is at the temperature of 75$0^{circ}C$ for 60 seconds leakage current was 29.15${ imes}10^{9}A$(at 5V).