- 니켈 폴리사이드 게이트의 열적안정성과 C-V 특성
- ㆍ 저자명
- 정연실,배규식,Jeong. Yeon-Sil,Bae. Gyu-Sik
- ㆍ 간행물명
- 한국재료학회지
- ㆍ 권/호정보
- 2001년|11권 9호|pp.776-780 (5 pages)
- ㆍ 발행정보
- 한국재료학회
- ㆍ 파일정보
- 정기간행물| PDF텍스트
- ㆍ 주제분야
- 기타
$SiO_2$ and polycrystalline Si layers were sequentially grown on (100) Si. NiSi was formed on this substrate from a 20nm Ni layer or a 20nm Ni/5nm Ti bilayer by rapid thermal annealing (RTA) at $300~500^{circ}C$ to compare thermal stability. In addition, MOS capacitors were fabricated by depositing a 20nm Ni layer on the Poly-Si/$SiO_2$substrate, RTA at $400^{circ}C$ to form NiSi, $BF_2$ or As implantation and finally drive- in annealing at $500~800^{circ}C$ to evaluate electrical characteristics. When annealed at $400^{circ}C$, NiSi made from both a Ni monolayer and a Ni/Ti bilayer showed excellent thermal stability. But NiSi made from a Ni/Ti bilayer was thermally unstable at $500^{circ}C$. This was attributed to the formation of insignificantly small amount of NiSi due to suppressed Ni diffusion through the Ti layer. PMOS and NMOS capacitors made by using a Ni monolayer and the SADS(silicide as a dopant source) method showed good C-V characteristics, when drive-in annealed at $500^{circ}C$ for 20sec., and$ 600^{circ}C$ for 80sec. respectively.