Advanced back-end processing requires the integration of low-k dielectrics and Cu. However, in the presence of an electric field and a temperature, positive Cu ions may drift rapidly through dielectric and causing reliability problems. Therefore, in this paper, Cu+ drift diffusion in two low-k materials and silicon oxide is evaluated. The drift diffusion is investigated by measuring shifts in the flat band voltage of capacitance-voltage measurements on Cu gate capacitors after bias thermal stressing. The Cu+ drift late in $SiO_{x}C_{y};(2.85{pm}0.03)$ and Polyimide(2.7${leq}k{leq}3.0$) is Considerably lower than in thermal oxide.