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A Novel Single Phase Synchronous Reference Frame Phase-Locked Loop with a Constant Zero Orthogonal Component
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  • A Novel Single Phase Synchronous Reference Frame Phase-Locked Loop with a Constant Zero Orthogonal Component
  • A Novel Single Phase Synchronous Reference Frame Phase-Locked Loop with a Constant Zero Orthogonal Component
저자명
Li. Ming,Wang. Yue,Fang. Xiong,Gao. Yuan,Wang. Zhaoan
간행물명
Journal of power electronics : JPE
권/호정보
2014년|14권 6호|pp.1334-1344 (11 pages)
발행정보
전력전자학회
파일정보
정기간행물|ENG|
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이 논문은 한국과학기술정보연구원과 논문 연계를 통해 무료로 제공되는 원문입니다.
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기타언어초록

A novel single phase Phase-Locked Loop (PLL) is proposed in this paper to accurately and rapidly estimate the instantaneous phase angle of a grid. A conjugate rotating vector pair is proposed and defined to synthesize the single phase signal in the stationary reference frame. With this concept, the proposed PLL innovatively sets one phase input of the PARK transformation to a constant zero. By means of a proper cancellation, a zero steady state phase angle estimation error can be achieved, even under magnitude and frequency variations. The proposed PLL structure is presented together with guidelines for parameters adjustment. The performance of the proposed PLL is verified by comprehensive experiments. Satisfactory phase angle estimation can be achieved within one input signal cycle, and the estimation error can be totally eliminated in four input cycles for the most severe conditions.